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Andes RISC-V Superscalar Multicore A(X)45MP and Vector Processor NX27V Upgrade Their Spec. and Performance 

Andes Technology Corporation upgrades the spec and performance of its superscalar multicore AndesCore™ 45MP family and the first commercial RISC-V vector processor IP, AndesCore™ NX27V. The 8-stage superscalar multiprocessor A(X)45MP was announced one year ago. It supports up to four cores and is equipped with DSP, single/double precision FPU (floating-point unit), and Linux-capable Memory Management Unit. Compared with the previous versions, the upgraded 32-bit A45MP and 64-bit AX45MP deliver up to 3x memory bandwidth while raising the floating-point performance by over 20% as measured by Whetstone benchmark. The latency for Level-1 Cache miss and Level-2 Cache hit is reduced by half and it leads to the outstanding 3.4 SPECint2006/GHz performance. In addition, the upgrade also includes RISC-V trace interface and debug spec.  

“The 45-series families are welcomed by the market since introduced last year. They are used in diversified applications, ranging from high-end MCU, video processing, WiFi 7, 5G base station, AI accelerators, to enterprise-grade storage devices. We are excited that the newly upgraded A(X)45MP with enhanced memory subsystem and optimized FPU can deliver prominent performance to address a wider range of applications. The industrial leading NX27V vector processor just got another award, the EDA & IP Product Award from EE Times (Nov. 16). It has been adopted by nearly 10 customer projects, targeting cloud accelerators with manycore architecture. In this release, NX27V provides a wider range of configurations to cover a variety of performance/area choices,” said Andes President and CTO Dr. Charlie Su. “Together with the complete software development environment and libraries support, A(X)45MP and NX27V are ready to serve more high-performance applications from the edge to the cloud.”
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Andes Technology Issues GDR on Luxembourg Stock Exchange;
Positioning for Booming RISC-V Market Growth

Andes Technology successfully executed its overseas depositary receipts (GDR) on the Luxembourg Stock Exchange on September 13. Each newly issued overseas depositary receipts unit will represent 2 ordinary shares, and its initial market value is priced at US$31.78, which is approximately NT$440 per share. A total of 4 million units are issued, representing 8 million shares of common stock. The total amount raised overseas is approximately US$127 million (NT$3.517 billion). Andes Technology is currently the only public RISC-V CPU IP supplier, and the GDR shareholders are mainly foreign institutional investors who aim for long-term investment.

“The funding allows Andes to boost medium-term and long-term capital investing in R&D and expanding product lines, especially high-end products, “Frankwell Lin, Chairman and CEO of Andes Technology stated. "Andes’ design centers in Taiwan, United States and Canada plan to recruit 200 R&D engineers to develop next-generation RISC-V products for applications including 5G, artificial intelligence/machine learning, HPC, ADAS, automotive electronics, AR /VR, blockchain, cloud computing, data center, server, Internet of Things, MCU, storage devices, security, wireless devices, and other massive and high-performance computing markets.”
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Kneron Edge AI SoC Powered by Andes RISC-V Processor Core D25F

“The D25F CPU core with its powerful DSP instruction set and development framework enables Kneron to explore the performance of its industry-leading AI algorithms to the fullest while keeping power consumption optimal. It is crucial to our customers, especially for those who develop products such as smart devices and Edge AI appliances," said Albert Liu, Kneron founder and CEO. " Kneron was able to develop this cutting-edge solution smoothly within a very short time frame. We are really proud to see KL530 in mass production now serving our customers.” San Diego-based Edge AI solution provider, Kneron Inc. announced mass production of Kneron’s next-generation Edge AI SoC KL530, powered by the D25F processor from Andes.

“We are pleased that Kneron chose the D25F to power KL530, especially after it went through a series of comprehensive evaluations,” said Andes CEO and RISC-V International Board Director Frankwell Lin. “The D25F stands out distinctly in every aspect on key indexes such as product features, performance, core area, and power consumption. As a leading provider of Edge AI SoC solution embedded with RISC-V core, Kneron showed its efficiency to quickly launch KL530 and enter mass production. Thanks to the extraordinary cooperation between Kneron and Andes, we jointly achieved a complete and highly competitive solution to facilitate AI applications for a wide variety of products.”
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HPMicro Semiconductor Announces the Release of the HPM6000 Series of Microcontrollers with AndesCore™ Dual D45 Cores
"HPMicro's HPM6000 series have high-speed computing power and real-time control functions. They provide a more flexible and efficient choice for the high-end MCU market." Dr. Charlie Su, President and CTO of Andes Technology said, "With D45 and AndeSight™ IDE tools, customers can design software with higher performance and streamlined program codes. HPMicro leads the industry by launching high-performance RISC-V embedded MCU security solutions. It shows the ultra-high efficiency and excellent R&D capabilities from the HPMicro team."

“AndesCore™ D45 is the only RISC-V processor IP that can meet the requirements of HPMicro ultra-speed real-time computing. In some cases, the performance is even higher than the competitors by 50%! And Andes team’s in-time support service during product implementation stage helps us complete the tape out of the HPM6000 series successfully and quickly," Jintao Zeng, CEO of HPMicro Semiconductor said. “It’s perfect and efficient cooperation by our two teams.” 
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Ashling RiscFree™ Now Supports Andes Technology RISC-V CPUs
Ashling and Andes Technology announced at RISC-V Summit that Ashling’s RiscFree™ Toolchain will be extended to support the broad range of Andes RISC-V CPU IPs including support for the AndeStar™ V5 Performance and CoDense™ ISA Extension.
“Ashling’s RiscFree™ with its Different Cores, One Solution feature set now brings the power of heterogeneous, multi-core debugging to Andes RISC-V CPU users allowing a single instance of RiscFree™ to debug any number of heterogeneous and homogeneous cores” said Hugh O’Keeffe, Managing Director of Ashling.
“We are delighted to have Ashling RiscFree™ support Andes RISC-V CPU cores and offer an additional choice for our customers, particularly those working on heterogeneous SoC designs utilizing AndesCore™ V5 RISC-V processors with increased performance and reduced code size” said Dr. Charlie Su, Andes Technology President and CTO.
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Codeplay Software Partners with Andes Technology to Achieve Software First SoC Design for AI-based Applications Using RISC-V Vector Processors
“Codeplay is embracing the software-first approach to designing complex compute systems,” said Andrew Richards, CEO and founder of Codeplay Software. “This partnership with Andes will bring developers of RISC-V vector SoCs the opportunity to optimize their architecture based on real application software.” Coldplay's Acoran software platform support for NX27V-based simulator and then SoC will provide a wide ecosystem of domain-specific optimized libraries for exascale and artificial intelligence. A key foundation of Acoran is SYCL, an open standard programming model that enables heterogeneous programming based on standard ISO C++..

“The NX27V has been adopted by about 10 customer SoC projects for the datacenter accelerators. All incorporate multiple instances of our vector processor in cluster-based heterogenous architecture,” said Dr. Charlie Su, President and CTO at Andes Technology. “The exciting partnership with Codeplay enables us to bring elegant programming solutions to our customers.  We are at the beginning of the next wave SoCs with Domain-Specific Architecture (DSA) for applications ranging from embedded devices to datacenter accelerators that support AI and HPC. The growth potential in this area is enormous.”
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Andes Technology and Cyberon Collaborate to Provide Edge-Computing Voice Recognition Solution on DSP-Capable RISC-V Processors
“The AI technology of edge computing has gradually entered people’s lives,” said Alex Liou, VP of Cyberon Corporation's Embedded solution BU. “Cyberon’s DSpotter algorithm helps developers to reduce development costs of voice recognition applications. We offer a convenient and easy-to-use tool to create customized commands of global languages. Developers can create various voice recognition applications efficiently to meet the strong and diverse demands of the market. The collaboration with Andes extends the application of DSpotter technology to RISC-V platforms and demonstrates excellent computing and recognition performances. It is hoped that it will bring more products with intelligent and convenient voice interface to people’s lives.”

”Intelligence is now in everyone’s daily life empowering not only by cloud computing but also by edge computing,” said Simon Wang, Technical Marketing Manager of Andes Technology, and in charge of RISC-V compute acceleration ecosystem. “Andes offers a comprehensive 32- and 64-bit RISC-V processor core series with high computation efficiency and low power consumption for general computing solutions. In addition, we provide AI solutions based on RVP, RVV and ACE instruction extensions with the support of Andes NN SDK and have been cooperating with partners to extend our solutions. We are excited to work with Cyberon to offer very competitive voice recognition and voice assistant solutions for edge devices based on the strength of AndesCore™ D25F, esp. its RVP support.”
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Andes Technology USA Corp. Announces
Major Expansion of Its U.S. Operation

Andes Technology USA Corp., the headquarters of North America operations of Hsinchu, Taiwan-based Andes Technology Corporation, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced a major expansion of Its U.S. operation. Andes Technology USA is greatly increasing engineering headcount in both the San Jose, California headquarters and its Portland, Oregon research and development facility. Andes Technology USA is seeking engineers in the U.S. and Canada to work remotely or in the Portland or San Jose offices. Openings are available for design engineers, verification engineers, and field application engineers.

“Major semiconductor companies worldwide adopting the RISC-V ISA and the RISC-V International work groups rapid development of the RISC-V ISA extensions is driving demand for engineers to keep up with the fast pace of new technology development,” said Emerson Hsiao, Andes Technology USA Corp. Chief Operating Officer. “RISC-V customers like the growing number of extensions coming available as well as their ability to customize the architecture to better fit their processing requirements. Our tool Andes Custom Extensions (ACE) makes the customization process easier and less risky. To keep up with RISC-V technical developments and to serve our customers’ requests, we expect to greatly expand the size of our U.S. operation.”
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Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator
“We applaud Andes’ initiative in expanding the reach and visibility of the RISC-V ISA,” said Calista Redmond, CEO of RISC-V International. “As an open computing platform, the continued growth and adoption of RISC-V depends on a broad ecosystem of hardware and software tools and IP. Andes contributing its silicon-proven RISC-V IP to the Silicon Catalyst incubator will help make it easier for emerging startups to build the next generation of semiconductor applications with RISC-V.”

“Andes has been helping a steady stream of new design starts to incorporate our wide range of RISC-V AndesCore™ processors,” said Dr. Charlie Su, President and CTO of Andes Technology. “Silicon start-ups such as those in the Silicon Catalyst incubator program are ideal examples of the new ventures. Many have great products on papers but need the IP and tools to lift their design from the page and implement it in silicon. The Silicon Catalyst incubator and Andes provide them the perfect environment and high efficiency RISC-V CPU IPs to achieve this goal. We are delighted to be part of this endeavor.” 
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2860 Zanker Road, Suite 104, San Jose, CA, 95134 
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