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Will Arm Risk RISC-V?

What’s at stake?
Andes Technology, a Taiwanese CPU core IP company, began phasing out its proprietary processing architecture in favor of RISC-V in 2015, as it prepared to go public. Is adding RISC-V an option for Arm before its planned fiscal-2022 IPO? While Arm’s too-big-to-fail ecosystem makes this notion unlikely, can Arm convince investors and shareholders that it can continue to grow without an open-source instruction set architecture (ISA)?

Making ISA open-source is a long-term trend among chip developers. Its persistence forces companies to dabble in it, embrace it, or — at their considerable peril — ignore it.

For chip designers, adding an open-source RISC-V core to an Arm-based system-on-chip has not been a tough decision. Just as a DSP or graphics IP core can be added to an existing SoC, RISC-V is yet another ingredient that can be integrated on the main application processor.

On the other hand, replacing Arm-based solutions with SoCs based on new RISC-V-based CPU cores demands not just due diligence, but prudent justification.  Click to read the full story in The Ojo-Yoshida Report!

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Andes Technology Corp.
2860 Zanker Rd
Suite 104
San Jose, CA  95134

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